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| ST7263B LOW SPEED USB 8-BIT MCU FAMILY WITH FLASH/ROM, UP TO 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I C DATA BRIEFING s s s s s s Memories - 4, 8 or 16 Kbytes Program Memory: High Density Flash (HDFlash) or ROM with Readout and Write Protection - In-Application Programming (IAP) and In-Circuit programming (ICP) for HDFlash devices - 384 or 512 bytes RAM memory (128-byte stack) Clock, Reset and Supply Management - Run, Wait, Slow and Halt CPU modes - 12 or 24 MHz Oscillator - RAM Retention mode - Optional Low Voltage Detector (LVD) USB (Universal Serial Bus) Interface - DMA for low speed applications compliant with USB 1.5 Mbs (version 1.1) and HID specifications (version 1.0) - Integrated 3.3 V voltage regulator and transceivers - Suspend and Resume operations - 3 Endpoints with programmable In/Out configuration 19 I/O Ports - 8 high sink I/Os (10 mA at 1.3 V) - 2 very high sink true open drain I/Os (25 mA at 1.5 V) - 8 lines individually programmable as interrupt inputs 2 Timers - Programmable Watchdog - 16-bit Timer with 2 Input Captures, 2 Output Compares, PWM output and clock input 2 Communications Interfaces - Asynchronous Serial Communications Inter- PSDIP32 SO34 (Shrink) face (on K4 and K2 versions only) - I C Multi Master Interface up to 400 kHz (on K4 versions only) 1 Analog Peripheral - 8-bit A/D Converter (ADC) with 8 channels Instruction Set - 63 basic instructions - 17 main addressing modes - 8 x 8 unsigned multiply instruction - True bit manipulation Development Tools - Versatile Development Tools (under Windows) including assembler, linker, C-compiler, archiver, source level debugger, software library, hardware emulator, programming boards and gang programmers s s s Table 1. Device Summary Features Program Memory -bytesRAM (stack) - bytes Peripherals Operating Supply CPU frequency Operating temperature Packages ST72F63BK4 16K (Flash) 512 (128) ST7263BK2 8K (Flash or ROM) 384 (128) ST7263BK1 4K (Flash or ROM) Watchdog timer, 16-bit timer, SCI, I C, Watchdog timer, Watchdog, 16-bit timer, ADC, USB 16-bit timer, SCI, ADC, USB ADC, USB 4.0 V to 5.5 V 8 MHz (with 24 MHz oscillator) or 4 MHz (with 12 MHz oscillator) 0 C to +70 C SO34/SDIP32 Rev. 1.3 December 2001 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/7 1 ST7263B 1 INTRODUCTION The ST7263B Microcontrollers form a sub-family of the ST7 MCUs dedicated to USB applications. The devices are based on an industry-standard 8bit core and feature an enhanced instruction set. They operate at a 24 MHz or 12 MHz oscillator frequency. Under software control, the ST7263B MCUs may be placed in either Wait or Halt modes, thus reducing power consumption. The enhanced instruction set and addressing modes afford real programming potential. In addition to standard 8bit data management, the ST7263B MCUs feature true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes. The devices include an ST7 Core, up to 16 Kbytes of program memory, up to 512 bytes of RAM, 19 I/O lines and the following on-chip peripherals: - USB low speed interface with 3 endpoints with programmable in/out configuration using the DMA architecture with embedded 3.3V voltage regulator and transceivers (no external components are needed). Figure 1. General Block Diagram INTE RNAL CLOCK OSC/3 OSCILLATOR OSC/4 or OSC/2 (for USB) VDD VSS POWER SUPPLY WATCHDO G PORT B ADC PORT C SCI* (UART) USB SIE PC[2:0] (3 bits) ADDRESS AND DATA BUS - 8-bit Analog-to-Digital converter (ADC) with 8 multiplexed analog inputs - Industry standard asynchronous SCI serial interface (not on all products - see Table 1 Device Summary) - Watchdog - 16-bit Timer featuring an External clock input, 2 Input Captures, 2 Output Compares with Pulse Generator capabilities - Fast I C Multi Master interface (not on all products - see device summary) - Low voltage reset (LVD) ensuring proper poweron or power-off of the device All ST7263B MCUs are available in ROM or Flash versions. Flash devices support programming in IAP mode (In-application programming) via the on-chip USB interface. OSCIN OSCOUT I C* PORT A 16-BIT TIMER PA[7:0] (8 bits) RESET CONTROL 8-BIT CORE ALU LVD USB DMA PB[7:0] (8 bits) VPP/TEST VDDA VSSA PROGRAM MEMORY (4K/8K/16K Bytes) RAM (384/512 Bytes) USBDP USBDM USBVCC * Not on all products (refer to Table 1: Device Summary) 2/7 ST7263B 2 PIN DESCRIPTION Figure 2. 34-Pin SO Package Pinout VDDA USBVC C USBDM USBDP VSSA PA0/MCO PA1(25mA)/SDA/ ICCDATA NC NC NC PA2(25mA)/SCL/ICCCLK PA3/EXTC LK PA4/ICAP1/IT1 PA5/ICAP2/IT2 PA6/OCMP1/IT3 PA7/OCMP2/IT4 PB0(10mA)/AIN0 VDD OSCOUT OSCIN VSS PC2/USBOE PC1/TDO PC0/RDI RESET NC AIN7/IT8PB7(10mA) AIN6/PB6/IT7(10mA) VPP/TEST AIN5/IT6/PB5(10mA) AIN4/IT5/PB4(10mA) AIN3/PB3(10mA) AIN2/PB2(10mA) AIN1/PB1(10mA) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 * VPP on Flash versions only Figure 3. 32-Pin SDIP Package Pinout VDD OSCOUT OSCIN VSS PC2/USBOE PC1/TDO PC0/RDI RESET AIN7/IT8/PB7(10mA) AIN6/IT7/PB6(10mA) VPP/TEST* AIN5/IT6/PB5(10mA) AIN4/IT5/PB4(10mA) AIN3/PB 3(10mA) AIN2/PB 2(10mA) AIN1/PB1/(10mA) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VDDA USBVCC USBDM USBDP VSSA PA0/MCO PA1(25mA)/SDA/ICCDA TA NC NC PA2(25mA)/SCL/ICCCLK PA3/EXTCLK PA4/ICAP1/IT1 PA5/ICAP2/IT2 PA6/COMP1/IT3 PA7/COMP2/IT4 PB0(10mA)/AIN0 * VPP on Flash versions only 3/7 ST7263B PIN DESCRIPTION (Cont'd) RESET (see Note 1): Bidirectional. This active low signal forces the initialization of the MCU. This event is the top priority non maskable interrupt. This pin is switched low when the Watchdog is triggered or the VDD is low. It can be used to reset external peripherals. OSCIN/OSCOUT: Input/Output Oscillator pin. These pins connect a parallel-resonant crystal, or an external source, to the on-chip oscillator. VDD/VSS (see Note 2): Main Power Supply and Ground voltages. VDDA/VSSA (see Note 2): Power Supply and Ground voltages for analog peripherals. Table 2. Device Pin Description Pin n Type SDIP32 SO34 Pin Name Level Output Input Alternate Functions: Several pins of the I/O ports assume software programmable alternate functions as shown in the pin description. Note 1: Adding two 100 nF decoupling capacitors on the Reset pin (respectively connected to VDD and VSS) will significantly improve product electromagnetic susceptibility performance. Note 2: To enhance the reliability of operation, it is recommended that VDDA and VDD be connected together on the application board. This also applies to V SSA and VSS. Port / Control Input float wpu ana int Output OD PP Main Function (after reset) Alternate Function 1 2 3 4 5 6 7 8 -9 1 2 3 4 5 6 7 8 9 VDD OSCOUT OSCIN VSS PC2/USBOE PC1/TDO PC0/RDI RESET NC S O I S I/O I/O I/O I/O -I/O C T 10mA X I/O C T 10mA X S I/O C T 10mA X I/O C T 10mA X I/O C T 10mA X I/O C T 10mA X I/O C T 10mA X I/O C T 10mA X I/O I/O I/O I/O CT CT CT CT X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X CT CT CT X X X X X X X X Power supply voltage (4V - 5.5V) Oscillator output Oscillator input Digital ground Port C2 Port C1 Port C0 Reset Not connected Port B7 Port B6 ADC analog input 7 ADC analog input 6 USB Output Enable SCI Transmit Data Output* SCI Receive Data Input* 10 PB7/AIN7/IT8 10 11 PB6/AIN6/IT7 11 12 VPP/TEST 12 13 PB5/AIN5/IT6 13 14 PB4/AIN4/IT5 14 15 PB3/AIN3 15 16 PB2/AIN2 16 17 PB1/AIN1 17 18 PB0/AIN0 18 19 PA7/OCMP2/IT4 19 20 PA6/OCMP1/IT3 20 21 PA5/ICAP2/IT2 21 22 PA4/ICAP1/IT1 Programming supply Port B5 Port B4 Port B3 Port B2 Port B1 Port B0 Port A7 Port A6 Port A5 Port A4 ADC analog input 5 ADC analog input 4 ADC analog input 3 ADC analog input 2 ADC analog input 1 ADC Analog Input 0 Timer Output Compare 2 Timer Output Compare 1 Timer Input Capture 2 Timer Input Capture 1 4/7 ST7263B Pin n Type SDIP32 SO34 Pin Name Level Output Input Port / Control Input float wpu ana int Output OD PP Main Function (after reset) Port A3 Port A2 Not connected Not connected Not connected T X X Port A1 Port A0 Analog ground USB bidirectional data (data +) USB bidirectional data (data -) USB power supply Analog supply voltage I C serial data*, ICC Data Main Clock Output Alternate Function 22 23 PA3/EXTCLK 23 24 PA2/SCL/ICCCLK -- 25 NC 24 26 NC 25 27 NC 26 28 PA1/SDA/ICCDATA 27 29 PA0/MCO 28 30 VSSA 29 31 USBDP 30 32 USBDM 31 33 USBVCC 32 34 VDDA I/O CT X T X Timer External Clock I C serial clock*, ICC Clock I/O C T 25mA X ---I/O C T 25mA X I/O S I/O I/O O S CT Note (*): if the peripheral is present on the device (see Table 1, "Device Summary") Legend / Abbreviations for Figure 2 and Table 2: Type: I = input, O = output, S = supply In/Output level: CT = CMOS 0.3VDD/0.7VDD with input trigger Output level: 10mA = 10mA high sink (on N-buffer only) 25mA = 25mA very high sink (on N-buffer only) Port and control configuration: - Input: float = floating, wpu = weak pull-up, int = interrupt, ana = analog - Output: OD = open drain, PP = push-pull, T = True open drain The RESET configuration of each pin is shown in bold. This configuration is kept as long as the device is under reset state. 5/7 ST7263B 3 PACKAGE CHARACTERISTICS 3.1 PACKAGE MECHANICAL DATA Figure 4. 34-Pin Shrink Plastic Small Outline Package, 300-mil Width Dim. A A1 B 0.10mm .004 seating plane C D E e H h K L N SO34S mm Min 2.46 0.13 0.36 0.23 17.73 7.42 1.02 10.16 0.64 0.61 10.41 0.400 0.74 0.025 0 1.02 0.024 Typ Max Min 2.64 0.097 0.29 0.005 0.48 0.014 0.32 0.0091 18.06 0.698 7.59 0.292 inches Typ Max 0.104 0.0115 0.019 0.0125 0.711 0.299 0.040 0.410 0.029 8 0.040 Number of Pins 34 Figure 5. 32-Pin Shrink Plastic Dual in Line Package, 400-mil Width E Dim. mm Min 3.56 0.51 3.05 0.36 0.76 0.20 3.56 0.46 1.02 0.25 Typ 3.76 Max Min 0.020 4.57 0.120 0.140 0.180 0.58 0.014 0.018 0.023 1.40 0.030 0.040 0.055 0.36 0.008 0.010 0.014 inches Typ Max 5.08 0.140 0.148 0.200 See Lead Detail A A1 C A2 b1 b e3 D eA eB b b1 C D E E1 27.43 27.94 28.45 1.080 1.100 1.120 9.91 10.41 11.05 0.390 0.410 0.435 7.62 8.89 1.78 10.16 12.70 2.54 3.05 Number of Pins 9.40 0.300 0.350 0.370 0.070 0.400 0.500 3.81 0.100 0.120 0.150 32 N E1 e 1 N/2 A2 A A1 L e eA eB L N VR01725J 6/7 ST7263B Notes: Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in lif e support devices or systems without the express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2002 STMicroelectronics - All Rights Reserved. Purchase of I2C Components by STMicroelectronics conveys a license under the Philips I2 C Patent. Rights to use these components in an I2 C system is granted provided that the system conforms to the I2 C Standard Specification as defined by Philips. STMicroelectronics Group of Companies Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http:/ /www.st.com 7/7 |
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